Single-instruction multiple-data (SIMD) processors are characterized by having an array of processing elements that perform the same operation simultaneously on every element of a stream of data values. A type of SIMD processor is an SVP processor, characterized by a linear array of processing elements and a "layered" structure, in which an input register receives data word-serially, processing elements perform computations on the data, and an output register outputs the processed data word-serially.
One application of SVP processors is for video data processing, such as in digital televisions or other display devices. Each stream of data values represents a line of pixels of an image. The line are processed line-by-line. Each processing element processes a different pixel value.
The data delivered to an SVP-based display device does not always have the same horizontal or vertical resolution as that of the display size of the image to be displayed. When this is the case, the SVP processor is used to scale the data.
Horizontal scaling may either increase or decrease the horizontal resolution of the input data, by expanding or decimating each line of input data, respectively. When the SVP processor expands the data, it uses the input pixel values to generate new pixel values. When it decimates the data, it removes pixel values and usually first combines the removed values with neighboring pixel values.
When lines of input data are to expanded, each line has more pixel values output from the SVP than are input. Somehow, space must be provided within the SVP for the new pixel values. This has been accomplished by using external memory at the input of the SIMD or by data shift instructions.
Similarly, when lines of input data are to be decimated, each line has more pixel values input to the SVP than are output. The resulting gaps at the data output must be eliminated. This has been accomplished by using external memory at the output of the SIMD or by data shift instructions.